Video is captured at speeds of up to 6.25 Gigabits/Second (Gb/S). Simultaneously, control commands and triggers can be sent to the camera 20 Mb/S (with a trigger accuracy of +/- 2 nanoseconds). Up to 13 W of power can also supplied to the camera. All this happens over a single piece of industry standard 75 Ohm coaxial cable.
Multiple CXP links can be aggregated to support higher data rates (e.g. four links provide 25 Gb/S of data).
The CXP standard opens the door to applications where cable cost, routing requirements and long distances have prevented the move to high resolution, high speed digital cameras. In many cases, existing coaxial infrastructure can be repurposed for CXP with very low installation costs.
The Cyton-CXP is based on BitFlow's brand new PCIe Gen 2.0 platform. To develop the Cyton platform, we first started with a clean slate, and asked ourselves, "what does a next generation frame grabber need?" For sure, it needs a Gen 2.0 PCIe x8 back end for the ultimate high speed access to host memory. It also needs a sophisticated DMA engine to handle the demands of new camera interface standards. New standards demand flexibility. For example, CXP cameras will soon be able to put out streams of random sized ROIs, something our previous generation DMA engine was not capable of. Finally, we know based on years of experience of making frame grabbers, that it needs flexible and powerful I/O, triggering and routing. The CoaXPress front end is based on our Karbon-CXP, but upgraded and ready for the coming changes in the CXP standards. The Cyton platform is the foundation for today's and tomorrows frame grabbers, be it CoaXPress, Camera Link, or whatever new standards emerge from the Machine Vision industry.
The Virtual Frame Grabber
The Cyton-CXP4 can be configured in many different ways. It can acquire from one quad CXP-6 camera (total data rate: 25 Gb/S) , or four single link CXP-6 cameras, or anything in between. When acquiring from multiple cameras, each camera is attached to its own virtual frame grabber. This allows independent acquisition and control of each camera.However, when a four link camera is attached, only one virtual frame grabber is needed.
The StreamSync system consists of an Acquisition Engine and a Buffer Manager. The StreamSync system was first released on the Cyton-CXP and is a departure from previous BitFlow frame grabbers. The StreamSync system is a start-from-scratch complete redesign of the acquisition and DMA parts of a frame grabber. BitFlow used it years of experience in this area to design a next generation, super efficient capture system.
CoaXPress High Speed Uplink
The Cyton-CXP has an optional fifth CXP connector that can run the full 6.25 Gb/S from the frame grabber to the camera. The CoaXPress standard is still evolving, but the need for this high speed uplink has already become apparent. The demands for bulk uploads to the camera, and precise trigger accuracy have already outstripped the current 20 Mb/S uplink specification. The Cyton-CXP is fully ready when the new CXP standard is released that defines when and how this uplink will be used.
PCI Express Gen 2.0 Interface
The Cyton-CXP has a Gen 2.0 x8 PCI Express bus interface. The Gen 2.0 PCIe bus doubles the data rate of the Gen 1.0 bus while using the same footprint and connectors. The Cyton-CXP is fully backwards compatible with Gen 1.0 motherboards, though the data rate will be halved. However, Gen 2.0 motherboards have been shipping for a few years and will be the norm on almost all motherboards looking forward. The board will work in any slot that it fits in. This means not only x16 and x8 slots, but also, as is becoming the trend, x4 and x1 slots that use x16 connectors. Performance will be degraded in x1 and x4 slots, but the board will work fine in applications that don't require maximum data rate.
Camera Control and I/O
The Cyton-CXP can acquire fixed or variable size images and features a programmable ROI (Region Of Interest) sub-windowing capability. The Cyton-CXP fully supports the CoaXPress 1.1 specification, which provides a high priority trigger packet from the frame grabber to the camera (note: both 1.1 and 1.0 cameras are supported, but the GPOI packet part of the 1.0 specification is not). All I/O signals can be routed to/from many internal and external destinations, the flexibility of the routing is unprecedented in the industry. In addition, there are separate hardware I/O signals which can be connected to/from external source. Finally each CXP camera has a fully set of these signals which can be run independently. The Cyton-CXP board, as with our past interface products, supports not only simple triggering modes but also complicated, application-specific triggering and control interactions with your hardware environment.
Adding the Cyton-CXP to your application is simple with our SDK, which supports both 32-bit and 64-bit operating systems. Applications can be developed using C/C++/.NET and our sophisticated buffer management APIs. In addition, free drivers can be download from our web site for most 3rd party machine vision packages. The Cyton models are software compatible with each other, as well as with all the other current BitFlow frame grabbers. This makes migrating applications from Camera Link or analog to CXP simple and quick.